Bringing Moore’s Law to Test
Professor of Electrical and Computer Engineering, Director of the Center for the Development of Technological Leadership and the H.W. Sweatt Chair for Technical Leadership at the University of Minnesota.
Dr. Amin holds BS (cum laude) and MS degrees in electrical and computer engineering from the University of Massachusetts-Amherst and MS and DSc degrees in systems science and mathematics from Washington State University in St. Louis.
Dr. Amin worked for five years at the Electric Power Research Institute in Palo Alto where he developed and led collaborative research among public, private, and academic groups on a national and strategic level. Prior to joining EPRI, Dr. Amin held a variety of professorial positions for twelve years at Washington University in systems science and mathematics and was the recipient of many professor, mentor and leadership awards voted by students and peers.
In a prolific career, Dr. Amin has authored or co-authored 125 research papers; he has published 42 articles in technical journals and 47 major technical reports. He has been an invited lecturer 174 times.
Engineer, Entrepreneur and Founder of Atcor, Inc.
Dr. Bardina holds a BS in civil engineering from a Chilean National University. He also holds three MS degrees from Stanford University in the fields of mechanical engineering civil engineering and pricing theory.
Bardina has over 30 years of global experience in the semiconductor and data storage industries. He was founder and CEO of Atcor before it was acquired by Entegris in 2001. At Atcor he established three business divisions, sold its instrumentation division, acquired the company's largest competitor and developed joint ventures with companies in China and Singapore. Bardina served as Senior VP, Business Development at Entegris.
He holds two patents in cleaning technology and currently serves on the Board of Directors of Perisale Corporation, Yolanda SA and the Chilean Technology Development Council.
Semiconductor Test Consultant. Business Development Consultant for Optimal Test and Independent Professional Service Provider.
Jeff earned a BSEE in 1972 and is a 25- year veteran of ATE and semiconductor test, having worked with such companies as Schlumberger Technologies, Advantest and Teradyne. Jeff holds five patents in the test area and was the original founder of Pintail Technologies, a test improvement company. He is an independent semiconductor test consultant in Plano, TX with a multiple client base including Israeli-based Optimal Test. Improving all aspects of test is his life and passion.
President and COO and member of the Board of Directors of Sanmina-Sci Corporation, a leading electronics contact manufacturer in global electronics manufacturing serves (EMS).
Joe holds a BS degree in Accounting from Firfield University and an MBA from the University of Connecticut. He is a CPA and in 2006 was inducted into the University of Connecticut Business School Hall of Fame.
Prior to his current position, Joe served as President and CEO and member of the Board of Directors of Form Factor, the leader in the advanced wafer probe card market. He also held a series of senior management positions at Applied Materials including CFO, EVP and a member of the Office of the President.
Joe serves on the boards of Jacobs Engineering Group and SDC Materials, a development-stage nanotechnology materials company. He is a member of the Advisory Board of Leavey School of Business at Santa Clara University and of the Board of Regents a Bellarmine High School in San Jose California.
Dr. Kenneth M. Butler is a TI Fellow in the External Development and Manufacturing Group within Texas Instruments. He has been with TI for 25 years and has worked in the areas of semiconductor design for testability, test generation, and reliability for more than 20. Ken has authored or co-authored more than 50 conference and journal publications. He holds a BS from Oklahoma State University and an MS and PhD from The University of Texas at Austin.
Professor of Electrical and Computer Engineering at Portland State University and founder and co-director of the Portland State University Integrated Circuits Design and Test Laboratory.
Dr. Daash received his BS from Oregon State University and a PhD from the University of Washington. He is a member of IEEE and the Sigma Xi and Phi Kappa Phi honor societies.
His active research interests are digital and analog integrated circuit design and test. Currently he is principal investigator on sponsored research projects with IBM, LSI Logic, Advanced Inquiry Systems (formerly known as Octavian Scientific), Texas Instruments and Semiconductor Research Corporation. Dr. Daasch has made significant contributions to solutions to the challenges of cost-of-test, test methodology and defect-based testing. He holds three patents and he and his research time of Electrical and Computer Engineering students pursuing MS and PhD degrees, have received several research awards for authorship and outstanding lecture series.
Business Consultant and Managing Director of Quotients, Inc.
Walt holds a BS degree from the University of Iowa and an MA degree from Eastern Michigan University.
Walt was President and a member of the Board of Directors of Silicon Valley companies Dryden Engineering (contamination control) and EKC Technologies (specialty chemicals). He was Executive Director for the Crocker family business holdings in San Francisco. He held management positions with Fortune 500 companies; namely Cabot Corporation, Rexall Chemical and Olin Corporation. He was selected as one of the top ten Marketing Executives in US by an advertising agency in Dallas and was a featured cover story article in an international trade journal for industry leadership and marketing success in Ohio.
He authored "Market View and Analysis-Semiconductor Test" for Octavian in 2006 and co-authored the business book, "The New Business Normal", published in 2005.
Currently, Don is a business process consultant to high technology companies and an Adjunct Professor at the OHSU School of Medicine, Division of Management (formerly the Oregon Graduate Institute) teaching graduate courses in Global Business Management and Operations Management.
Don recently retired from a 33 year career in high technology companies including Hewlett-Packard, Kentrox Industries, Protocol Systems, Integrated Measurement Systems, and Credence Systems. Don was the President/COO of Integrated Measurement Systems. Inc (IC test validation systems - NASDAQ; IMSC), a $75Million public company until it was acquired by Credence Systems. While at Credence Systems, Don held executive level M&A responsibilities in the USA, Japan, and Germany and was formerly the VP of Japanese Operations for Credence Systems.
Don has 18 years of executive level experience in corporate strategic planning at four high tech companies including several years of leading the strategic planning process.
Don has 16 years experience in the semiconductor test industry plus 3 years experience in wafer fab and IC assembly. He was a member of the startup team for HP's Corvallis IC fabrication, assembly, and test facility. He was Engineering Project Manager at HP for a new, innovative IC packaging capability which included package design, tooling, manufacturing startup, and fixturing for burn-in and test. At IMS Don was responsible for the IMS test fixturing group which provided custom solutions to customers for IC test probing, test system interfacing, quality assurance, and burn-in.
Don has a BS in Physics from the Naval Academy and a MBA from the Harvard Business School.
President of SMIC America, SMIC or Semiconductor Manufacturing International Corporation is a China-based wafer foundry where it's headquarter is in Shanghai with production facilities in four Chinese cities.
Dr. Wang holds a BS degree in physics from Tsing Hua University of Taiwan and a PhD in Electronic Materials from Princeton University.
He has more than 25 years experience in semiconductors in the areas of process integration, device physics, business operation and marketing and sales. Prior to SMIC, he was VP of Operations for 8x8 Inc., a fables chip design company. He also was cofounder and EVP of ICT Inc., a device company specializing in nonvolatile memories and programmable logic devices. Earlier in his career, he was employed by Hughes Aircraft, Intel and National Semiconductor.
He has made invited speeches to SEMI, FAS, SEMICON, the National Venture Capital Association and several investment banker conference. He is also the venture partner of Asenqua Venture Capital, a private venture firm in the Bay Area and is a leading member of Gerson Lehrman Group, a global network of council members and investors based in New York.
Recently retired from Credence Systems
Dr. West holds a BS and PhD in Physics. He is a 35-year veteran in Instrumentation and Automatic Test Equipment. His career includes E-H Research, Autek Systems, Schlumberger Technologies, NPTest and Credence Systems. West holds 33 US patents of which 27 are tet-related and the remaining focused on FPGA architecture and circuitry. He is a Life Fellow of the Institute of Electrical and Electronic Engineers and a Life Member of Sigma Xi. He was a contributor to ITR-Test and has been a serious advocate of full-wafer probing for over a decade. He is also active in open-source software in graphics and design automation.
Chairman of One Angstrom LLC. Retired from Intel as Senior Vice President and member of the Corporate Management Committee.
Dr. Yu received his BS degree in electrical engineering from the California Institure of Technology and his MS and PhDdegrees from Stanford University both in electrical engineering.
Dr. Yu retired from Intel in 2002 after having been with Intel for almost thirty years. He was Senior VP and General Manager of the heart of Intel's business; microprocessory, chipsets, boards, software and research for sixteen years. Under his leadership, Intel's microprocessors from 386a to the latest Pentium 4 processor have become the highest volume microchips that power computers and the internet. He also headed Intel's corporate strategy that led to its entry into the optoelectronics business and its extensive international; expansion. Prior to Intel, he was employed with Fairchild R &D Labs where he conducted research and development of solid-state devices and circuits.
Dr. Yu serves on the boards of several hi-tech companies and is a member of the Committee of 100. He has lectured around the world on management and technology and has authored over 30 technical publications.
Intel Corporation - Test Technology Target Spec owner
Koorosh Zaerpoor has been involved in silicon and backend test since he joined Intel Corporation in 2000 as a senior process engineer. Since then, he has served in the lead capacity in sort module development including methodology definition and process development for Intel factories worldwide. He led the development of ultra-fine (>3000 probes/cm2) probe arrays and logic probing process and served as the owner of worldwide probing supplier development with vendors in Japan, Ireland, France, Asia and US. In 2005, he moved to Sort/Test Technology Equipment Pathfinding group where he became the owner of backend test handler technology definition with focus on developing a liquid TIM chuck for sort, starting a program for strong collaboration with academia and research institutions to develop alternative thermal technology for active thermal control at test, and building a dedicated Pathfinding backend test lab in Oregon. Since 2007, he has been serving in the capacity of Test Technology Target Spec owner, and has spent much of his time understanding and analyzing semiconductor roadmap especially as it relates to test. He has employed what he has learned from technology trending to define and propose novel test techniques such as socket-less device and singulated silicon testing.
Koorosh earned his PhD in Nuclear Physics from Oregon State University and worked as a Post-Doctoral Fellow at Space Sciences Lab at UC Berkeley. His main work there, involved the development of the Extremely Heavy Cosmic Ray Observer and cosmic-ray chronometry for developing galactic evolution theories.